ABRACON AB-557-03-HCLV-F-L-C-T PLL Based Clock Driver 557 Series
Enhance your electronic systems with the high-performance AB-557-03 series clock driver from ABRACON, a trusted manufacturer of advanced semiconductor solutions. Designed for precision timing applications, this PLL-based clock driver offers excellent stability and low jitter, making it ideal for high-speed digital and communication systems.
Part Number: AB-557-03-HCLV-F-L-C-T
Manufacturer: ABRACON
Country of Origin: TH (Thailand)
Package Type: REEL (14-pin QFN, 3.2 x 2.5 x 0.85 mm)
UOM: EA (Each)
ECCN: EAR99
RoHS Compliant: Yes
Key Features
Frequency range from 2.3 MHz to 460 MHz, with typical operation at 100 MHz
Low jitter performance with period jitter as low as 2.5 ps RMS at 100 MHz
High frequency stability within ±100 ppm (initial tolerance, temperature, and voltage variations)
Supply voltage range of +2.25 V to +3.6 V for flexible integration
Fast enable/disable times (20 ns) and startup time of approximately 5 ms
Differential output with peak-to-peak swing of 750 mV
Operating temperature from -20°C to +70°C; storage temperature from -55°C to +150°C
RoHS compliant and MSL Level 1 for reliable handling and environmental safety
Electrical Specifications
Parameters
Minimum
Typical
Maximum
Unit
Notes
Frequency
2.3
100
460*1
MHz
Supply Voltage (V DD)
+2.25
+3.6
V
Supply Current (Enabled)
60
mA
R =50Ω, Load
Supply Current (Disabled)
21
23
mA
Startup Time
5
ms
Enable Time
20
ns
Disable Time
5
ns
Aging
-5.0
+5.0
ppm
First year
Output Offset Voltage (V OH)
0.725
V
R =50Ω Load
Peak to Peak Output Swing
750
mV
Single-Ended
Rise Time (t r)
200
400
ps
R =50Ω, C=2pF
Fall Time (t f)
200
400
ps
Duty Cycle (SYM)
48
52
%
Differential
Period Jitter (J PER)
2.5
ps RMS
At 100 MHz
Integrated Phase Noise (PCIe Gen 1.1)
0.540
ps RMS
J RMS- (PCIe Gen 2.1)
0.458
ps RMS
J RMS-CC (PCIe Gen 3.0)
0.165
ps RMS
Pin Configuration
Pin No.
Pin Name
Pin Type
Description
1
OE
I
Output Enable; active high
2
NC
NA
Ground Connected or Leave Unconnected
3
NC
NA
Ground Connected or Leave Unconnected
4
VSS
Power
Ground
5
NC
NA
Ground Connected or Leave Unconnected
6
NC
NA
Ground Connected or Leave Unconnected
7
NC
NA
Ground Connected or Leave Unconnected
8
CLK1+
O
True output of differential pair
9
CLK1-
O
Complement output of differential pair
10
CLK0-
O
Complement output of differential pair
11
CLK0+
O
True output of differential pair
12
VDD0
Power
Power Supply for Output 0 (CLK+/- 0)
13
VDD1
Power
Power Supply for Core and Output 1 (CLK+/- 1)
14
NC
NA
Ground Connected or Leave Unconnected
For detailed technical specifications and application information, please refer to the datasheet.
Note: The datasheet was not processed; please search the internet for the part number for more details.
Use left/right arrows to navigate the slideshow or swipe left/right if using a mobile device
Choosing a selection results in a full page refresh.
Press the space key then arrow keys to make a selection.
Shopping Cart
{"id":10027894735165,"title":"AB-557-03-HCLV-F-L-C-T","handle":"ab-557-03-hclv-f-l-c-t","description":"\u003ch3\u003eABRACON AB-557-03-HCLV-F-L-C-T PLL Based Clock Driver 557 Series\u003c\/h3\u003e\n\u003cp\u003eEnhance your electronic systems with the high-performance AB-557-03 series clock driver from ABRACON, a trusted manufacturer of advanced semiconductor solutions. Designed for precision timing applications, this PLL-based clock driver offers excellent stability and low jitter, making it ideal for high-speed digital and communication systems.\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003e\n\u003cstrong\u003ePart Number:\u003c\/strong\u003e AB-557-03-HCLV-F-L-C-T\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eManufacturer:\u003c\/strong\u003e ABRACON\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eCountry of Origin:\u003c\/strong\u003e TH (Thailand)\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003ePackage Type:\u003c\/strong\u003e REEL (14-pin QFN, 3.2 x 2.5 x 0.85 mm)\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eUOM:\u003c\/strong\u003e EA (Each)\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eECCN:\u003c\/strong\u003e EAR99\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eRoHS Compliant:\u003c\/strong\u003e Yes\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003eKey Features\u003c\/h3\u003e\n\u003cul\u003e\n\u003cli\u003eFrequency range from 2.3 MHz to 460 MHz, with typical operation at 100 MHz\u003c\/li\u003e\n\u003cli\u003eLow jitter performance with period jitter as low as 2.5 ps RMS at 100 MHz\u003c\/li\u003e\n\u003cli\u003eHigh frequency stability within ±100 ppm (initial tolerance, temperature, and voltage variations)\u003c\/li\u003e\n\u003cli\u003eSupply voltage range of +2.25 V to +3.6 V for flexible integration\u003c\/li\u003e\n\u003cli\u003eFast enable\/disable times (20 ns) and startup time of approximately 5 ms\u003c\/li\u003e\n\u003cli\u003eDifferential output with peak-to-peak swing of 750 mV\u003c\/li\u003e\n\u003cli\u003eOperating temperature from -20°C to +70°C; storage temperature from -55°C to +150°C\u003c\/li\u003e\n\u003cli\u003eRoHS compliant and MSL Level 1 for reliable handling and environmental safety\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003eElectrical Specifications\u003c\/h3\u003e\n\u003ctable\u003e\n\u003ctr\u003e\n\u003cth\u003eParameters\u003c\/th\u003e\n\u003cth\u003eMinimum\u003c\/th\u003e\n\u003cth\u003eTypical\u003c\/th\u003e\n\u003cth\u003eMaximum\u003c\/th\u003e\n\u003cth\u003eUnit\u003c\/th\u003e\n\u003cth\u003eNotes\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eFrequency\u003c\/td\u003e\n\u003ctd\u003e2.3\u003c\/td\u003e\n\u003ctd\u003e100\u003c\/td\u003e\n\u003ctd\u003e460*1\u003c\/td\u003e\n\u003ctd\u003eMHz\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSupply Voltage (V DD)\u003c\/td\u003e\n\u003ctd\u003e+2.25\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e+3.6\u003c\/td\u003e\n\u003ctd\u003eV\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSupply Current (Enabled)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e60\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003emA\u003c\/td\u003e\n\u003ctd\u003eR =50Ω, Load\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSupply Current (Disabled)\u003c\/td\u003e\n\u003ctd\u003e21\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e23\u003c\/td\u003e\n\u003ctd\u003emA\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eStartup Time\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003ems\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eEnable Time\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e20\u003c\/td\u003e\n\u003ctd\u003ens\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDisable Time\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003ens\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eAging\u003c\/td\u003e\n\u003ctd\u003e-5.0\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e+5.0\u003c\/td\u003e\n\u003ctd\u003eppm\u003c\/td\u003e\n\u003ctd\u003eFirst year\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eOutput Offset Voltage (V OH)\u003c\/td\u003e\n\u003ctd\u003e0.725\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eV\u003c\/td\u003e\n\u003ctd\u003eR =50Ω Load\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003ePeak to Peak Output Swing\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e750\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003emV\u003c\/td\u003e\n\u003ctd\u003eSingle-Ended\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eRise Time (t r)\u003c\/td\u003e\n\u003ctd\u003e200\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e400\u003c\/td\u003e\n\u003ctd\u003eps\u003c\/td\u003e\n\u003ctd\u003eR =50Ω, C=2pF\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eFall Time (t f)\u003c\/td\u003e\n\u003ctd\u003e200\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e400\u003c\/td\u003e\n\u003ctd\u003eps\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDuty Cycle (SYM)\u003c\/td\u003e\n\u003ctd\u003e48\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e52\u003c\/td\u003e\n\u003ctd\u003e%\u003c\/td\u003e\n\u003ctd\u003eDifferential\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003ePeriod Jitter (J PER)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e2.5\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003eAt 100 MHz\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eIntegrated Phase Noise (PCIe Gen 1.1)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e0.540\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eJ RMS- (PCIe Gen 2.1)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e0.458\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eJ RMS-CC (PCIe Gen 3.0)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e0.165\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/table\u003e\n\u003ch3\u003ePin Configuration\u003c\/h3\u003e\n\u003ctable\u003e\n\u003ctr\u003e\n\u003cth\u003ePin No.\u003c\/th\u003e\n\u003cth\u003ePin Name\u003c\/th\u003e\n\u003cth\u003ePin Type\u003c\/th\u003e\n\u003cth\u003eDescription\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e1\u003c\/td\u003e\n\u003ctd\u003eOE\u003c\/td\u003e\n\u003ctd\u003eI\u003c\/td\u003e\n\u003ctd\u003eOutput Enable; active high\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e2\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e3\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e4\u003c\/td\u003e\n\u003ctd\u003eVSS\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003eGround\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e6\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e7\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e8\u003c\/td\u003e\n\u003ctd\u003eCLK1+\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eTrue output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e9\u003c\/td\u003e\n\u003ctd\u003eCLK1-\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eComplement output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e10\u003c\/td\u003e\n\u003ctd\u003eCLK0-\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eComplement output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e11\u003c\/td\u003e\n\u003ctd\u003eCLK0+\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eTrue output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e12\u003c\/td\u003e\n\u003ctd\u003eVDD0\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003ePower Supply for Output 0 (CLK+\/- 0)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e13\u003c\/td\u003e\n\u003ctd\u003eVDD1\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003ePower Supply for Core and Output 1 (CLK+\/- 1)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e14\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/table\u003e\n\u003cp\u003eFor detailed technical specifications and application information, please refer to the \u003ca href=\"https:\/\/abracon.com\/Oscillators\/AB-557-03.pdf\" target=\"_blank\"\u003edatasheet\u003c\/a\u003e.\u003c\/p\u003e\n\u003cp\u003eNote: The datasheet was not processed; please search the internet for the part number for more details.\u003c\/p\u003e\u003cbr\u003e","published_at":"2025-08-16T04:22:06+05:30","created_at":"2025-08-16T04:22:06+05:30","vendor":"Waldom Electonics","type":"Semiconductors","tags":["ABRAC","Clock","IMPORT_CSV","IMPORT_PT2","PLL","Semiconductors","Timer","WLDM"],"price":38113,"price_min":38113,"price_max":38113,"available":true,"price_varies":false,"compare_at_price":null,"compare_at_price_min":0,"compare_at_price_max":0,"compare_at_price_varies":false,"variants":[{"id":50626256437565,"title":"Default Title","option1":"Default Title","option2":null,"option3":null,"sku":"AB-557-03-HCLV-F-L-C-T","requires_shipping":true,"taxable":true,"featured_image":null,"available":true,"name":"AB-557-03-HCLV-F-L-C-T","public_title":null,"options":["Default Title"],"price":38113,"weight":250,"compare_at_price":null,"inventory_management":"shopify","barcode":"AB-557-03-HCLV-F-L-C-T","requires_selling_plan":false,"selling_plan_allocations":[]}],"images":["\/\/thinkrobotics.com\/cdn\/shop\/files\/AB-557-03-HCLV-F-L-C-T_52348625_6e1cd03c.jpg?v=1755298330"],"featured_image":"\/\/thinkrobotics.com\/cdn\/shop\/files\/AB-557-03-HCLV-F-L-C-T_52348625_6e1cd03c.jpg?v=1755298330","options":["Title"],"media":[{"alt":null,"id":45861700436285,"position":1,"preview_image":{"aspect_ratio":2.295,"height":200,"width":459,"src":"\/\/thinkrobotics.com\/cdn\/shop\/files\/AB-557-03-HCLV-F-L-C-T_52348625_6e1cd03c.jpg?v=1755298330"},"aspect_ratio":2.295,"height":200,"media_type":"image","src":"\/\/thinkrobotics.com\/cdn\/shop\/files\/AB-557-03-HCLV-F-L-C-T_52348625_6e1cd03c.jpg?v=1755298330","width":459}],"requires_selling_plan":false,"selling_plan_groups":[],"content":"\u003ch3\u003eABRACON AB-557-03-HCLV-F-L-C-T PLL Based Clock Driver 557 Series\u003c\/h3\u003e\n\u003cp\u003eEnhance your electronic systems with the high-performance AB-557-03 series clock driver from ABRACON, a trusted manufacturer of advanced semiconductor solutions. Designed for precision timing applications, this PLL-based clock driver offers excellent stability and low jitter, making it ideal for high-speed digital and communication systems.\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003e\n\u003cstrong\u003ePart Number:\u003c\/strong\u003e AB-557-03-HCLV-F-L-C-T\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eManufacturer:\u003c\/strong\u003e ABRACON\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eCountry of Origin:\u003c\/strong\u003e TH (Thailand)\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003ePackage Type:\u003c\/strong\u003e REEL (14-pin QFN, 3.2 x 2.5 x 0.85 mm)\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eUOM:\u003c\/strong\u003e EA (Each)\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eECCN:\u003c\/strong\u003e EAR99\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eRoHS Compliant:\u003c\/strong\u003e Yes\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003eKey Features\u003c\/h3\u003e\n\u003cul\u003e\n\u003cli\u003eFrequency range from 2.3 MHz to 460 MHz, with typical operation at 100 MHz\u003c\/li\u003e\n\u003cli\u003eLow jitter performance with period jitter as low as 2.5 ps RMS at 100 MHz\u003c\/li\u003e\n\u003cli\u003eHigh frequency stability within ±100 ppm (initial tolerance, temperature, and voltage variations)\u003c\/li\u003e\n\u003cli\u003eSupply voltage range of +2.25 V to +3.6 V for flexible integration\u003c\/li\u003e\n\u003cli\u003eFast enable\/disable times (20 ns) and startup time of approximately 5 ms\u003c\/li\u003e\n\u003cli\u003eDifferential output with peak-to-peak swing of 750 mV\u003c\/li\u003e\n\u003cli\u003eOperating temperature from -20°C to +70°C; storage temperature from -55°C to +150°C\u003c\/li\u003e\n\u003cli\u003eRoHS compliant and MSL Level 1 for reliable handling and environmental safety\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003eElectrical Specifications\u003c\/h3\u003e\n\u003ctable\u003e\n\u003ctr\u003e\n\u003cth\u003eParameters\u003c\/th\u003e\n\u003cth\u003eMinimum\u003c\/th\u003e\n\u003cth\u003eTypical\u003c\/th\u003e\n\u003cth\u003eMaximum\u003c\/th\u003e\n\u003cth\u003eUnit\u003c\/th\u003e\n\u003cth\u003eNotes\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eFrequency\u003c\/td\u003e\n\u003ctd\u003e2.3\u003c\/td\u003e\n\u003ctd\u003e100\u003c\/td\u003e\n\u003ctd\u003e460*1\u003c\/td\u003e\n\u003ctd\u003eMHz\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSupply Voltage (V DD)\u003c\/td\u003e\n\u003ctd\u003e+2.25\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e+3.6\u003c\/td\u003e\n\u003ctd\u003eV\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSupply Current (Enabled)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e60\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003emA\u003c\/td\u003e\n\u003ctd\u003eR =50Ω, Load\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSupply Current (Disabled)\u003c\/td\u003e\n\u003ctd\u003e21\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e23\u003c\/td\u003e\n\u003ctd\u003emA\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eStartup Time\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003ems\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eEnable Time\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e20\u003c\/td\u003e\n\u003ctd\u003ens\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDisable Time\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003ens\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eAging\u003c\/td\u003e\n\u003ctd\u003e-5.0\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e+5.0\u003c\/td\u003e\n\u003ctd\u003eppm\u003c\/td\u003e\n\u003ctd\u003eFirst year\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eOutput Offset Voltage (V OH)\u003c\/td\u003e\n\u003ctd\u003e0.725\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eV\u003c\/td\u003e\n\u003ctd\u003eR =50Ω Load\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003ePeak to Peak Output Swing\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e750\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003emV\u003c\/td\u003e\n\u003ctd\u003eSingle-Ended\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eRise Time (t r)\u003c\/td\u003e\n\u003ctd\u003e200\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e400\u003c\/td\u003e\n\u003ctd\u003eps\u003c\/td\u003e\n\u003ctd\u003eR =50Ω, C=2pF\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eFall Time (t f)\u003c\/td\u003e\n\u003ctd\u003e200\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e400\u003c\/td\u003e\n\u003ctd\u003eps\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDuty Cycle (SYM)\u003c\/td\u003e\n\u003ctd\u003e48\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e52\u003c\/td\u003e\n\u003ctd\u003e%\u003c\/td\u003e\n\u003ctd\u003eDifferential\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003ePeriod Jitter (J PER)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e2.5\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003eAt 100 MHz\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eIntegrated Phase Noise (PCIe Gen 1.1)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e0.540\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eJ RMS- (PCIe Gen 2.1)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e0.458\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eJ RMS-CC (PCIe Gen 3.0)\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003e0.165\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003ctd\u003eps RMS\u003c\/td\u003e\n\u003ctd\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/table\u003e\n\u003ch3\u003ePin Configuration\u003c\/h3\u003e\n\u003ctable\u003e\n\u003ctr\u003e\n\u003cth\u003ePin No.\u003c\/th\u003e\n\u003cth\u003ePin Name\u003c\/th\u003e\n\u003cth\u003ePin Type\u003c\/th\u003e\n\u003cth\u003eDescription\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e1\u003c\/td\u003e\n\u003ctd\u003eOE\u003c\/td\u003e\n\u003ctd\u003eI\u003c\/td\u003e\n\u003ctd\u003eOutput Enable; active high\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e2\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e3\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e4\u003c\/td\u003e\n\u003ctd\u003eVSS\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003eGround\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e6\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e7\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e8\u003c\/td\u003e\n\u003ctd\u003eCLK1+\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eTrue output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e9\u003c\/td\u003e\n\u003ctd\u003eCLK1-\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eComplement output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e10\u003c\/td\u003e\n\u003ctd\u003eCLK0-\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eComplement output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e11\u003c\/td\u003e\n\u003ctd\u003eCLK0+\u003c\/td\u003e\n\u003ctd\u003eO\u003c\/td\u003e\n\u003ctd\u003eTrue output of differential pair\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e12\u003c\/td\u003e\n\u003ctd\u003eVDD0\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003ePower Supply for Output 0 (CLK+\/- 0)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e13\u003c\/td\u003e\n\u003ctd\u003eVDD1\u003c\/td\u003e\n\u003ctd\u003ePower\u003c\/td\u003e\n\u003ctd\u003ePower Supply for Core and Output 1 (CLK+\/- 1)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e14\u003c\/td\u003e\n\u003ctd\u003eNC\u003c\/td\u003e\n\u003ctd\u003eNA\u003c\/td\u003e\n\u003ctd\u003eGround Connected or Leave Unconnected\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/table\u003e\n\u003cp\u003eFor detailed technical specifications and application information, please refer to the \u003ca href=\"https:\/\/abracon.com\/Oscillators\/AB-557-03.pdf\" target=\"_blank\"\u003edatasheet\u003c\/a\u003e.\u003c\/p\u003e\n\u003cp\u003eNote: The datasheet was not processed; please search the internet for the part number for more details.\u003c\/p\u003e\u003cbr\u003e"}
